This application is related to Japanese application No. 2002-067303 filed on Mar. 12, 2002, whose priority is claimed under 35 USC xc2xa7119, the disclosure of which is incorporated by reference in its entirety.
1. Field of the Invention
The present invention relates to a semiconductor device and, more specifically, to a semiconductor device package having solder balls as external connection terminals.
2. Description of the Related Art
For higher density integration of semiconductor devices on a mount board (mother board), the sizes of the respective semiconductor devices are reduced. Currently, a semiconductor device of BGA (ball grid array) type is known as having a reduced size. The BGA-type semiconductor device includes external terminals in the form of solder balls arranged in an area array on a bottom of a package for reduction of a mount area on the mount board.
Further, a semiconductor device of FBGA type having external terminals arranged at smaller pitches than the BGA-type semiconductor device is also known, which is implemented as a semiconductor device of CSP (chip size package) type.
An exemplary conventional CSP-type semiconductor device will be described with reference to FIGS. 5 to 7. FIG. 5 is a schematic sectional view illustrating the CSP-type semiconductor device. FIG. 6 is an enlarged diagram illustrating major portions of the semiconductor device of FIG. 5, and FIG. 7 is a bottom view of the semiconductor device of FIG. 6. In FIG. 7, no solder ball is illustrated for simplicity.
As shown in FIG. 5, the exemplary conventional CSP-type semiconductor device 101 includes a semiconductor chip 105 mounted on a upper surface of a substrate 102. Connection terminals (not shown) of the semiconductor chip 105 are connected to an interconnection pattern 103 provided on the upper surface of the substrate 102, for example, by bonding wires 109. The connection may be achieved by a flip chip method. The semiconductor chip 105 and the bonding wires 109 are sealed in a mold resin. The substrate 102 further has an interconnection pattern 104 provided on a lower surface thereof. The interconnection pattern 104 on the lower surface is electrically connected to the interconnection pattern 103 provided on the upper surface via through-hole electrodes 106.
The interconnection pattern 104 on the lower surface includes generally round lands 104a and interconnection portions 104b respectively extending from the lands 104a. As best shown in FIGS. 6 and 7, a resist film (solder resist film) 107 is provided on the interconnection pattern 104 on the lower surface. The resist film 107 has generally round openings 107a through which the lands 104a are exposed. Solder balls 108 are respectively bonded onto the exposed lands 104a. 
In generally, the bonding strength between the lands and the solder balls is important for the CSP-type semiconductor device. It is also important to prevent deformation and displacement of the solder balls which may be caused by fused solder spreading over the interconnection portions when the solder balls are bonded onto the lands. To this end, a consideration is given to the size of the openings formed in the resist film and the shape of the lands.
For example, there is known a semiconductor device in which lands inclusive of their side surfaces are completely exposed through greater size openings formed in a resist film and solder balls are bonded onto the lands as covering not only the top surfaces but also the side surfaces of the lands (see, for example, Japanese Unexamined Patent Publication No. 8-83865 (1996)). Since the solder balls cover the top and side surfaces of the lands in the semiconductor device, the bonding strength between the solder balls and the lands is improved.
There is also known a semiconductor device in which a resist film covers longitudinal end portions of oval lands (see, for example, Japanese Unexamined Patent Publication No. 9-232736 (1997)). This semiconductor device ensures a sufficient bonding strength between solder balls and the lands, while preventing the displacement of the solder balls.
As described above, the conventional semiconductor device in which the solder balls cover the top and side surfaces of the lands ensures an improved bonding strength between the solder balls and the lands. In this semiconductor device, however, not only the lands but also the interconnection portions extending from the lands are exposed from the resist film. More specifically, lead portions of the interconnection portions adjacent to the lands are exposed from the resist film. Therefore, fused solder is liable to spread over the lead portions of the interconnection portions when the solder balls are bonded onto the lands. This makes it difficult to form the solder balls into spherical shape. Further, there is a possibility that the solder balls have variations in diameter or are displaced.
In general, the lead portions of the interconnection portions adjacent to the lands each have a width progressively decreasing toward the interconnection portions apart from the lands for prevention of concentration of stresses on the interconnection portions. However, the openings formed in the resist film are greater in size than the lands in the semiconductor device, so that edges of the openings of the resist film are liable to cross the lead portions each having a progressively decreasing width. When the semiconductor device with the edges of the resist film crossing the lead portions is subjected to a post thermal cycle test, stresses caused due to a difference in linear expansion between the resist film and the interconnection portions are liable to concentrate on the lead portions. Particularly, the thinner lead portions crossed by the edges of the resist film are more liable to be broken.
On the other hand, the conventional semiconductor device in which the longitudinal edges of the oval lands are covered with the resist film also ensures a sufficient bonding strength between the solder balls and the lands, while preventing the displacement of the solder balls. However, the flexibility in designing the interconnection pattern is reduced, because the lands are oval.
In view of the foregoing, the present invention is directed to a semiconductor device which ensures a sufficient bonding strength between solder balls and lands, prevents the displacement of the solder balls, and allows for flexible design of an interconnection pattern.
According to the present invention, there is provided a semiconductor device, which comprises: a substrate; first and second interconnection patterns respectively provided on upper and lower surfaces of the substrate; a through-hole electrode extending through the substrate for electrically connecting the first and second interconnection patterns; a semiconductor chip provided on the upper surface of the substrate and electrically connected to the first interconnection pattern; and a resist film covering the second interconnection pattern; the second interconnection pattern comprising a generally round land and a lead interconnection portion extending from the land, the resist film having an opening formed therein for exposing the entire land, the opening having a curved edge surrounding a peripheral edge of the land and a linear edge linearly extending along a boundary between the land and the lead interconnection portion, the exposed land having a solder ball as an external terminal thereon.
In the inventive semiconductor device, the opening has the curved edge surrounding the peripheral edge of the land, and the linear edge linearly extending along the boundary between the land and the lead interconnection portion. Since the opening has such a configuration, the generally round land can entirely be exposed from the resist film, and the lead interconnection portion inclusive of a lead portion thereof adjacent to the land can completely be covered with the resist film.
Therefore, the solder ball is bonded onto the land as covering the top and side surfaces of the land, but fused solder is prevented from spreading over the lead interconnection portion.
As a result, a sufficient bonding strength can be ensured between the solder ball and the land, while the displacement of the solder ball can be prevented. Further, the flexibility in designing the lead interconnection portion is not reduced. In addition, the breakage of the lead portion adjacent to the land can be prevented, which may otherwise occur due to concentration of a stress caused by linear expansion of the resist film and the lead interconnection portion.